Non-volatile magnetic circuit
US6317359A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2000 |
| Grant date | Nov 13, 2001 |
| Priority date | — |
| Expiry date | Jun 28, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device and method for sensing the status of a non-volatile magnetic latch. A cross-coupled inverter pair latch cell is employed for the data sensing. During the `Sense` cycles, the inputs to the latch cell are from Giant Magneto-Resistive effect devices, each located in its respective inverter pair. The magneto-resistive storage devices have complimentary resistance states written into them. A switch, connected to the inverter pairs, is used to reset and initiate a regenerative sequence. Whenever the switch is turned on (reset) and off (regenerate), the latch cell will sense a potential imbalance generated by the magneto-resistive storage devices with complimentary resistance. During regeneration, the imbalance will be amplified and eventually the inverter pairs will reach a logic high or logic low state. The latch can be used as a memory circuit, however, upon loss of power the memory is retained. The state of the circuit is retained inside of GMR components. On-chip current lines are used to control the states of the components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.