Control of multiple equivalent functional units for power reduction
US6317840A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1999 |
| Grant date | Nov 13, 2001 |
| Priority date | — |
| Expiry date | Mar 24, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor with multiple equivalent functional units for power reduction, which includes a mechanism for controlling the selection of functional units. Specifically, the processor comprises a first circuit performing a predetermined function at a first speed, a second circuit for performing the same predetermined function at a second speed, and a control system for selecting either the first or second circuit to perform the function. The control system further includes a mechanism for controlling the rate of execution of the processor instructions in the pipeline in order to compensate for the speed at which the first or second circuit was performing the predetermined function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.