Self-calibrating circuit of high speed comparator
US6320426A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2000 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Dec 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356139
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A self-calibrating circuit of a high speed comparator, having a first negative phase logic switch, a second negative logic switch, a first positive phase logic switch, a second positive phase logic switch, a third negative phase logic switch, a fourth negative phase logic switch, a third positive phase logic switch, a fourth positive phase logic switch, a fifth positive phase logic switch, a first current source circuit, a second current source circuit and a control logic circuit. Using the first and the second current source circuits, a self-calibration can be performed while the high speed comparator is just turned on, so that the input offset voltage of the high speed comparator can be eliminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.