Duty-cycle correction driver with dual-filter feedback loop
US6320438A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 17, 2000 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Aug 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generator has a duty cycle correction circuit that adjusts the duty cycle to 50%. A modulator is an inverter with extra source-limiting transistors in series to the power and ground supplies. A control voltage of about Vcc/2 is applied to the source-limiting transistors, causing them to operate in the linear region with limited current. A slow-slew output from the modulator is buffered by a driver. The driver output is filtered by a linear detector with a series resistor and input capacitor. The detector output is compared to a reference voltage of Vcc/2 by an error amp. The error amp generates the control voltage fed back to the modulator. An output capacitor creates a dominant pole with the error amp to ensure stability. A variable-threshold gate can be added between the driver output and the detector to separately adjust the measurement threshold voltage from the reference voltage to the error amp.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.