Boost circuit
US6320455A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2000 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Mar 22, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/077
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Boost circuit units are connected in parallel. A boost output voltage V.sub.BOOST ' of a dummy boost circuit unit having the same configuration as the boost circuit units is detected by a voltage detection circuit. The voltage detection circuit outputs a signal TBST2 which becomes "high" when V.sub.BOOST ' is lower than V.sub.LIMIT and "low" when V.sub.BOOST ' is equal to or higher than V.sub.LIMIT. The TBST2 signal is input to a NAND circuit. When a "high" signal is input to the NAND circuit, an input voltage ATDBST2 is input to the boost circuit unit as well via the NAND circuit and the two boost circuit units perform boost operation. Thus, a boost circuit can suppress the dispersion of the boost voltage caused by the dispersion of the process condition and the variation of the external temperature besides the variation of the power supply voltage Vcc.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.