Cryptographic accelerator
US6320964A · kind A · utility
21Cited by
17References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 26, 1998 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Aug 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cryptographic accelerator for handling instruction-intensive bit permutations. The cryptographic accelerator comprises a selector and a plurality of buses coupled to the selector. Herein, at least one of the plurality of buses includes signal lines routed to perform a bit permutation operation incoming data. The bit permutation operation is one of a plurality of operations associated with a symmetric key function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.