Full cache coherency across multiple raid controllers
US6321298A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 1999 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Jan 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for providing cache coherency in a RAID system in which multiple RAID controllers provide read/write access to shared storage devices for multiple host computers. Each controller includes read, write and write mirror caches and the controllers and the shared storage devices are coupled to one another via common backend busses. Whenever a controller receives a write command from a host the controller writes the data to the shared devices, its write cache and the write mirror caches of the other controllers. Whenever a controller receives a read command from a host the controller attempts to return the requested data from its write mirror cache, write cache and read cache and the storage devices, in that order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.