Each iteration array selective loop data prefetch in multiple data width prefetch system using rotating register and parameterization to avoid redundant prefetch
US6321330A · kind A · utility
20Cited by
8References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1999 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | May 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a mechanism for prefetching array data efficiently from within a loop. A prefetch instruction is parameterized by a register from a set of rotating registers. On each loop iteration, a prefetch is implemented according to the parameterized prefetch instruction, and the address targeted by the prefetch instruction is adjusted. The registers are rotated for each loop iteration, and the prefetch instruction parameterized by the rotating register is adjusted accordingly. The number of iterations between prefetches for a given array is determined by the number of elements in the set of rotating register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.