Semiconductor device with trenched substrate and method
US6323090A · kind A · utility
64Cited by
11References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 9, 1999 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Jun 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/159
Abstract
A transistor structure has a recess formed in the upper surface of its base layer, an epitaxial (epi) layer grown on the upper surface in a manner to create a surface depression in the outer surface of the epi layer, the surface depression being generally aligned with the recess. A semiconductor element, such as a well or a gate, is formed on the epi layer aligned with the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.