Hexagonal arrangements of bump pads in flip-chip integrated circuits
US6323559A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1998 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Jun 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip integrated circuit die includes a semiconductor substrate, electronic components implemented on the semiconductor substrate, several plural metal layers, wires routed between the electronic components on the metal layers, a top layer, and bump pads arranged in a hexagonal array on the top layer. According to another aspect, the invention is directed to flip-chip integrated circuit design, in which a circuit description is input and standardized cells which correspond to electronic components in the circuit description are obtained. The standardized cells are laid out on the surface of the die using a rectangular-based layout technique, and bump pads are laid out in a hexagonal array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.