Dynamic bus locking in a cross bar switch
US6323755A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1998 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Aug 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cross-bar switch which includes a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses; a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses; a switching mechanism for selectively coupling the plurality of master bus ports to the plurality of slave bus ports; and a configuration mechanism for locking at least one of the plurality of slave buses in response to a transfer request initiated by a master device attached to one of the plurality of master buses. The cross-bar switch has the capability of selectively locking slave buses during a bus lock transfer. In the preferred embodiment, the configuration mechanism is a Bus Lock Bit on Configuration Registers on the cross-bar switch. The Bus Lock Bit is programmable through the Device Control Register bus, which allows the cross-bar switch to be dynamically programmable and changed by a processor in a larger system. The cross-bar switch minimizes the cycle latency between data transfers. This improves the bandwidth and throughput on the on-chip bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.