Bandgap reference circuit for charge balance circuits
US6323801A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 1999 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Jul 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/464
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and circuit for providing a reference voltage to a charge balance circuit. The method includes transferring charge corresponding to V.sub.BE and charge corresponding to .DELTA.V.sub.BE to a summing node of the charge balance circuit, where V.sub.BE is a voltage produced across a p-n junction and where .DELTA.V.sub.BE is a difference between two V.sub.BE voltages. With such method, instead of forming a bandgap reference circuit which produces a bandgap reference voltage and applying such voltage to the reference sampling and charge transfer circuit, charge corresponding to V.sub.BE and charge corresponding to .DELTA.V.sub.BE are transferred to the input summing node of the modulator in correct proportion and with a polarity corresponding to the modulator output. Thus, the reference sampling and charge transfer circuit delivers V.sub.BE and .DELTA.V.sub.BE charge samples to the summing node having the correct proportion and polarity, that in aggregate over a modulator cycle, equal the charge that sampling the reference voltage V.sub.REF produced by the explicit bandgap reference circuits would deliver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.