Computer system and method for tracking DMA transferred data within a read-ahead local buffer without interrupting the host processor
US6324599A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 1999 |
| Grant date | Nov 27, 2001 |
| Priority date | — |
| Expiry date | Jan 11, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system or computer system main memory is provided. The computer system includes a secondary memory and a buffer. The buffer is one having a faster access time than the secondary memory, and data placed within the buffer can be controlled by a control block configured with a control field and a byte count value of data bytes transferred during a DMA cycle, or a chain of DMA cycles. A counter may be used to increment the byte count within one or more control blocks during transfer of data bytes from secondary memory to the buffer. A requester is coupled to forward a read request that is serviced from the buffer if an address of the read request is included within an address incremented by the byte count. Both the control blocks and the buffer can be contained within a main memory local to the requester. Each control block includes a pointer field which points to a respective storage region of the buffer, and also contains the byte count field incremented during transfer of data bytes to one or more of the storage regions. If the previous read request address incremented by the byte count value encompasses the current read request address, then the current read request will…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.