Simultaneous multiple silicon on insulator (SOI) wafer production
US6326285A · kind A · utility
23Cited by
7References
53Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2000 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Feb 24, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming multiple SOI wafers from a plurality of individual wafers each having a first side and a second side. The method includes forming an oxide surface on the first side on each of the plurality of individual wafers and forming a hydrogen rich region at a preselected depth on the second side on each of the plurality of individual wafers. The wafers are then bonded into a stacked configuration and heat treated to fracture the wafers at the hydrogen rich regions. This fracture forms at least two SOI wafers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.