Ball grid array resistor network
US6326677A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 1998 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Sep 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A ball grid array resistor network has a substrate that has top and bottom surfaces. Resistors are disposed on the top surface. Conductors are disposed on the top surface, and each conductor is electrically connected to an end of each resistor. Vias extend through the substrate and are electrically connected to the conductors. Solder spheres are disposed on the bottom surface, and are electrically connected to the vias. A cover coat is disposed over the conductors and resistors. In an alternative embodiment, the vias are eliminated and the resistor network is formed on the bottom surface of the substrate. The resistor network provides a high density of resistors per unit area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.