Twisted bit line structures and method for making same
US6326695A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 1999 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Sep 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A twisted bit line structure (69) in an integrated memory circuit, and method for making it are presented. The structure is constructed by forming bit line traces (70-73) on an integrated circuit substrate using phase shift lithography techniques. Using these techniques, the bit line traces are arranged with a plurality of substantially parallel bit lines trace segments (70, 70'; 71, 71'; 72, 72'; 73, 73') with discontinuous regions between segments of each trace along a path substantially perpendicular to the bit line traces. Thus, each "phase .pi." bit line trace is adjacent a "phase 0" bit line trace along two perpendicular axes. A twist connection (74) is formed between first segments (72, 71') of a center pair (71, 72) of said bit line trace segments, and a bit line twist interconnection (82) is formed between second segments (71, 72') of said center pair of said bit line trace segments on a second integrated circuit level from a level containing the bit line traces. Linear interconnections (75, 76) are also formed between segments of outside bit line segments (70, 70'; 73, 73') to form continuous untwisted bit lines. The linear interconnections are also formed on an integrate…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.