Patent · US Expired

Apparatus and method for evaluating printed circuit board assembly manufacturing processes

US6326797A · kind A · utility

9Cited by
12References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 4, 1998
Grant dateDec 4, 2001
Priority date
Expiry dateMar 4, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K1/0268
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A test coupon for measuring the effects of solder processes on circuit testability. The test coupon includes a circuit board having a multiplicity of circuit conductor patterns. Each conductor pattern is connected to a plurality of pads and vias on the circuit board. The circuit pads on an opposite surface of the circuit board support solder connections to a plurality of different circuit components. The circuit pads are connected to the vias, which in turn are connected to individual conductors of the circuit pattern. A surface connector is also supported on the circuit board, having pins extending through the circuit board. The circuit pattern conductors terminate on a respective connector pin. The test coupon may be subject to in-circuit testing where a value of the various components are measured. The multiple circuit patterns and mounted components permit different types of tester pins to be used to evaluate in-circuit testability in a test coupon used in a particular manufacturing process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.