Automatic clock calibration circuit
US6326830A · kind A · utility
8Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/089
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An automatic clock calibration circuit includes a source of clock signals and an equal number of corresponding clock reference signals. Corresponding delay elements are connected between the source and the load driven by each of the clock signals. A phase frequency detector detects the phase differences between each clock signal, at the point at which it is applied to its load, and its corresponding clock reference signal. A microcontroller adjusts the delay of the delay elements according to the detected phase differences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.