Isolation circuit for use in RF amplifier bias circuit
US6326849A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2000 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Sep 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7206
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.