Method and system for allocating AGP/GART memory from the local AGP memory controller in a highly parallel system architecture (HPSA)
US6326973A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1998 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Dec 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/39
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer system having a highly parallel system architecture with multiple central processing units, multiple core logic chipsets and pooled system memory is provided with one or more AGP ports capable of connection to AGP devices. A memory manager is provided within the operating system for allocating pooled memory resources without regard to the location of that memory. A method is presented for dynamically allocating memory for the AGP device that is located on the same core logic chipset to which the AGP device is connected. By allocating local memory instead of allocating memory on remote core logic units, the AGP device can access the needed memory quickly without memory transmissions along the host bus, thereby increasing overall performance of the computer system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.