Semiconductor memory device
US6327210A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2000 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Nov 15, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device allowing for high-speed random accesses and yet requiring no external refreshing by performing internal refreshing automatically and efficiently. If no external commands /RE or /WT, instructing that data should be read out or written on a memory cell, are given, the output signal of a first AND gate is asserted. A second AND gate is provided to obtain a logical product of the output signal of the first AND gate and an internal refresh signal INTREF representing that refreshing may be performed internally and independently. The output signal REFEN of the second AND gate is used as a reference signal for automatic refreshing. Thus, refreshing is performed automatically by taking advantage of a window during which no external commands are input. And when an external command is input, refreshing is canceled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.