Inverter having a variable threshold potential
US6327211A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2001 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | Jan 26, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an inverter, each source of first to third P-channel MOS transistors is connected to a line of a source potential, a drain of the first P-channel MOS transistor is connected to an output node, each of first and second fuses is connected between each drain of the second and third P-channel MOS transistors and the output node, an N-channel MOS transistor is connected between the output node and a ground potential line, and each gate of these four MOS transistors is connected to an input node. At least one of the first and second fuses is blown out, and thereby, it is possible to reduce a threshold potential voltage of the inverter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.