Integrated circuit having hardware circuitry to prevent electrical or thermal stressing of the silicon circuitry
US6330668A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 1998 |
| Grant date | Dec 11, 2001 |
| Priority date | — |
| Expiry date | Aug 14, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit, such as a microprocessor, which incorporates hardware mechanisms to prevent the circuitry from operating outside the proper bounds of design. The hardware circuitry prevents the microprocessor circuitry from being forced to operate at clock speeds that are greater than it is designed for, from operating at temperatures above or below that which it is designed for, and from being forced to operate at voltages that are above or below voltages that the microprocessor is designed to operate at.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.