On chip error correction for devices in a solid state drive
US6330688A · kind A · utility
130Cited by
5References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1995 |
| Grant date | Dec 11, 2001 |
| Priority date | — |
| Expiry date | Oct 31, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An error correction arrangement for a flash EEPROM array including a plurality of redundant array circuits, apparatus for sensing when a hardware error has occurred in a block of the flash EEPROM array, and a circuit for replacing an array circuit with a redundant array circuit in response to detection of a hardware error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.