Process for manufacture of integrated circuit device using inorganic/organic matrix comprising polymers of three dimensional architecture
US6333141A · kind A · utility
7Cited by
40References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1998 |
| Grant date | Dec 25, 2001 |
| Priority date | — |
| Expiry date | Jul 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a process for forming an integrated circuit device comprising (i) a substrate; (ii) metallic circuit lines positioned on the substrate and (iii) a dielectric material positioned on the circuit lines. The dielectric material comprises porous organic polysilica.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.