Method of manufacturing semiconductor memory device having a capacitor
US6333226A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 1999 |
| Grant date | Dec 25, 2001 |
| Priority date | — |
| Expiry date | Oct 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/318
Abstract
Disclosed herein is a semiconductor memory device. In the semiconductor memory device, a transfer transistor having a drain region and a source region is formed on an Si semiconductor substrate. A lower end of a storage node is electrically connected to the drain region through a drain contact hole defined in an interlayer insulator. The storage node has an on-film extending portion which extends on an upper surface of the interlayer insulator, and a fin-shaped electrode portion which protrudes from the on-film extending portion. Structurally, the fin-shaped electrode portion is provided within a capacitor region so as to extend within a region smaller than the capacitor region and is spaced away from the on-film extending portion on the side of a bit line contact hole defined in the interlayer insulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.