Circuit and method for controlling a wordline and/or stabilizing a memory cell
US6333891A · kind A · utility
4Cited by
21References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2000 |
| Grant date | Dec 25, 2001 |
| Priority date | — |
| Expiry date | Jul 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit and method for controlling a wordline and/or stabilizing a memory cell comprising a first circuit and a second circuit. The first circuit may be configured to generate a control signal in response to (i) a select signal and (i) an equalization signal. The second may be configured to generate an output signal in response to (i) the control signal and (ii) a global wordline signal. The output signal may be presented to one or more memory cells of a memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.