Multiple power distribution for delta-I noise reduction
US6335494B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2000 |
| Grant date | Jan 1, 2002 |
| Priority date | — |
| Expiry date | Jun 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09663
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Power layers of a multi-layer connection structure forming a power distribution network are partitioned to accommodate all necessary voltages for one or more chips connected thereto in each power layer. By doing so, and rearranging vias as permitted by such partitioning via length is reduced while via numbers can be increased to reduce self-inductance of the structure. Transmission lines formed by conductors in the signal layers are referenced to the correct power supply and return/image currents are made of similar path length and substantially symmetrical for both positive- and negative-going signal transitions. These effects reduce delta-I noise to levels which preserve good signal-to-noise ratios to current and foreseeable reduced signal levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.