Low voltage mixer
US6335651B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2000 |
| Grant date | Jan 1, 2002 |
| Priority date | — |
| Expiry date | Nov 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer is designed to operate from a low voltage power source connected via a power terminal and ground and includes a balanced mixer circuit with a balanced input port for receiving local oscillator signals, and a pair of input terminals. A biasing circuit includes, an active voltage divider connected between the power terminal and ground to provide higher and lower voltages at first and second voltage taps. A differential driver circuit includes first and second transistors, collectors of which are each direct coupled to separate ones of the pair of input terminals. The first transistor has a base coupled via a capacitor to a single ended receive signal terminal, and an emitter coupled via a first resistor to ground. The second transistor has a base coupled via a capacitor to grounds, and an emitter coupled via a second resistor to the single ended receive signal terminal. The single ended receive signal terminal is also coupled with ground via an impedance element, in one example third resistor. A fourth resistor is connected between the first voltage tap and the base of the second transistor and, a fifth resistor is connected between the second voltage tap and the base electro…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.