System and method for regenerating clock signal
US6337650B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 7, 2000 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | Jun 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0334
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A clock-signal regenerating system for regenerating a clock signal by feeding back a phase difference between a demodulated analog data signal and a clock signal includes: an A/D converter for over-sampling the demodulated analog data signal to convert it into a digital signal; a data-change-direction detecting circuit for deciding a change in data sampled at its peak positions, to detect whether the data changed in an ascending direction or a descending direction; a threshold selecting circuit for holding a threshold and deciding a positive/negative sign of data sampled at its zero-crossing positions, to select the threshold; a phase-difference detecting circuit for comparing the data of the demodulated analog data signal sampled at the zero-crossing position to the selected threshold, to detect sampled data in excess of the threshold as a phase difference; and a multiplier for multiplying thus detected phase difference by data in thus detected data-change direction, to obtain a resultant phase difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.