High voltage device and method for fabricating the same
US6339243B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2000 |
| Grant date | Jan 15, 2002 |
| Priority date | — |
| Expiry date | Mar 2, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/421
Abstract
The disclosed high voltage device includes a semiconductor substrate, and a first semiconductor layer formed between an underlying first insulating layer and an overlying second insulating layer buried within the semiconductor substrate. The high voltage device includes first and second drift regions formed over the second insulating layer in the semiconductor substrate and spaced apart from each other, an emitter impurity region formed in the first drift region, and a collector impurity region formed in the second drift region. The high voltage device further includes a second semiconductor layer adjacent to and insulated from the collector impurity region, and connected to the first semiconductor layer, and a third semiconductor layer adjacent to and insulated from the emitter impurity region, and connected to the first semiconductor layer. The high voltage device includes a gate electrode formed over and insulated from the first drift region adjacent to the emitter impurity region; an emitter electrode electrically connected to the emitter impurity region and the third semiconductor layer, the emitter electrode being insulated from the gate electrode; a collector electrode elect…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.