Interleaving with golden section increments
US6339834B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 1999 |
| Grant date | Jan 15, 2002 |
| Priority date | — |
| Expiry date | May 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2771
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Interleavers based on golden-section increments are disclosed for use with Turbo and Turbo-like error-correcting codes. The interleavers have a tendency to maximally spread the error-bursts generated by an error-burst channel or decoder, independent of the error-burst length. The code block size uniquely defines a golden section increment without having to perform a time consuming search for the best increment value. The disclosed embodiments include golden relative prime interleavers, golden vector interleavers and dithered golden vector interleavers. Also disclosed are methods to reduce the size of memory required for storing the interleaving indexes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.