Magnetic random access memory circuit
US6341084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2001 |
| Grant date | Jan 22, 2002 |
| Priority date | — |
| Expiry date | May 15, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a magnetic random access memory circuit, the potential of all sense lines 121 to 124 are equalized, and the potential of all not-selected word lines 133, 135, 136 are equalized and the selected word line 134 is grounded so that a previously charged capacitor 114 is discharged by a current path passing from the capacitor 114 through a MOS transistor 118 maintaining the potential of the sense line 122 at a constant voltage lower than a break voltage, through the selected sense line 122, through the selected magneto-resistive element 142 and through the selected word line 134. Thus, a voltage applied to the magneto-resistive element is maintained at a level smaller than a voltage breaking the magneto-resistive elements or a voltage remarkably deteriorating the characteristics of the magneto-resistive elements because of a biasing effect when the tunnel magneto-resistive element is used, and on the other hand, a high precise and high speed reading can be realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.