Low power buffer system for network communications
US6341135B1 · kind B1 · utility
7Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1998 |
| Grant date | Jan 22, 2002 |
| Priority date | — |
| Expiry date | Feb 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0286
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
NMOS transistor buffers are used to buffer the output of a system. The system can include a network interface card. The NMOS transistor buffers receive the output of the shaped Ethernet data signals and drive a transformer. The NMOS transistor buffers allow for low power consumption while a feedback monitoring system provides stability by controlling the inputs to the NMOS transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.