Modular arithmetic coprocessor enabling the performance of non-modular operations at high speed
US6341299B1 · kind B1 · utility
13Cited by
10References
13Claims
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Key dates
| Filing date | Feb 19, 1999 |
| Grant date | Jan 22, 2002 |
| Priority date | — |
| Expiry date | Feb 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/728
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The computation time of modular operations on large-format data is improved by using a computation circuit integrated as a modular arithmetic coprocessor. The computation circuit carries out an S=A*B+C type operation, with S and C encoded on 2*Bt bits, and A and B encoded on Bt bits. To carry out this operation, a storage flip-flop circuit enables the storage of a possible overflow carry value at the end of an elementary computation, and reinserts this carry value during the following computation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.