Plasma display panel with dielectric layer suppressing reduced electrode conductivity
US6344713B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1997 |
| Grant date | Feb 5, 2002 |
| Priority date | — |
| Expiry date | Jul 14, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a plasma display panel comprising transparent electrodes and a dielectric layer covering said transparent electrodes on at least one substrate of a pair of substrates facing each other with a discharge space therebetween, the main constituent of the transparent electrodes is included in the dielectric layer. Further, the main constituent of the transparent electrode is indium oxide and indium oxide is included in the dielectric layer. By including the main constituent of the transparent electrodes in the dielectric layer, it is believed that the drop in conductivity caused by diffusion of the dielectric substance in the transparent electrodes during high-temperature processing is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.