Programmable gate array device
US6346826B1 · kind B1 · utility
4Cited by
17References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1998 |
| Grant date | Feb 12, 2002 |
| Priority date | — |
| Expiry date | Dec 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1735
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable gate array device (10) has a repeating block of circuitry (16) that includes a lowest metal layer. The repeating block of circuitry (16) includes a row of combinatorial blocks (20) and a row of flip flop circuitry (22). A number of metal segments (38) run perpendicular to the row of combinatorial blocks (20). The metal segments (38) are formed in a middle metal layer. A customizable metal layer forms a top metal layer (40).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.