Aliasing circuit and series interpolation cell of an analog-digital converter using such a circuit
US6346904B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2000 |
| Grant date | Feb 12, 2002 |
| Priority date | — |
| Expiry date | Aug 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/445
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal aliasing circuit that can be used especially to make a series interpolation cell of an interpolation analog-digital converter comprises two pairs of differential arms powered by one and the same current source connected to a first power supply terminal, each pair comprising two transistors, the transistors of one pair being parallel-connected with the transistors of the other pair. Each group of two parallel-connected transistors is connected by a respective common resistor to a second power supply terminal, the two outputs of the aliasing circuit being the combined collectors of the two groups of parallel-connected transistors. The disclosed device can be applied especially to converters whose architecture comprises what is known as a series interpolation part requiring high precision.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.