Method and apparatus for buffering received data from a serial bus
US6347097B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 4, 1998 |
| Grant date | Feb 12, 2002 |
| Priority date | — |
| Expiry date | Dec 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/40091
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for reading data from an IEEE 1394 serial bus system and storing the data in a FIFO includes partitioning the FIFO into a plurality of registers, each having 32 register bits for the data and a single register bit for a control data bit. To manipulate the system such that reads on a data quadlet involve only one system read on a 32-bit system, a packet token is stored in the initial register in a data packet. This packet token includes the quadlet count in the data packet. The host system need only read the first register in the data packet, the packet token, to determine the number of data quadlets within the data packet. Thereafter, the control data bit need not be read such that only a single read operation is performed for each operation of the read pointer. The last register associated with the packet is the acknowledge register which contains information that is sent back to the transmit node in the system. Further, each data packet can be divided into partitions with a plurality of packet tokens. Each packet token has a defined quadlet count associated therewith, the packet tokens disposed at the beginning of each partition. The last partition has a Complete bit set…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.