Reducing power consumption of an electronic device
US6347379B1 · kind B1 · utility
78Cited by
10References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 1998 |
| Grant date | Feb 12, 2002 |
| Priority date | — |
| Expiry date | Sep 25, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Leakage power consumption may be reduced in computers and other devices by providing a state where clocks are off and a low supply voltage is provided to the processor. This voltage may be sufficiently low to prevent adverse consequences while dramatically reducing leakage current. In addition, caches may be flushed to reduce the soft error rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.