Planarization method for semiconductor device
US6348415B1 · kind B1 · utility
9Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1999 |
| Grant date | Feb 19, 2002 |
| Priority date | — |
| Expiry date | Dec 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0234
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention discloses a planarization method for semiconductor device. The planarization method includes the steps of: providing a semiconductor substrate in which metal patterns are formed with various pattern densities; depositing a porous oxide layer over the semiconductor substrate so as to cover the metal patterns; plasma-treating surface of the porous oxide layer; and polishing the plasma-treated porous oxide layer by chemical mechanical polishing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.