Patent · US Expired

Digital variable-delay circuit having voltage-mixing interpolator and methods of testing input/output buffers using same

US6348826B1 · kind B1 · utility

35Cited by
16References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 28, 2000
Grant dateFeb 19, 2002
Priority date
Expiry dateJun 28, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00065
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A variable-delay circuit on an integrated circuit is used to delay a periodic strobe signal. In normal operation, the strobe signal can be shifted 90 degrees to center it within a data bit cell. In test mode, it can also be shifted up to 270 degrees in N increments to measure the effective input latch setup and hold timings. The variable-delay circuit comprises a voltage-mixing interpolator circuit to produce phase delays in N increments. The variable-delay circuit can incorporate an existing delay locked loop. Also described are an electronic system, a data processing system, and various methods of performing on-chip testing and calibration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.