Method of manufacturing photodefined integral capacitor with self-aligned dielectric and electrodes
US6349456B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1998 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Dec 31, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.