Semiconductor structure and method of making contacts and source and/or drain junctions in a semiconductor device
US6350665B1 · kind B1 · utility
27Cited by
24References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Apr 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76802
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment (100), a method of manufacturing a semiconductor device may include forming diffusion regions in a substrate with a gate, first spacer, and second spacer as a diffusion mask (102). A second spacer may then be removed (104) prior to the formation of an interlayer dielectric. An interlayer dielectric may then be formed (106) over a gate structure and first spacer. A contact hole may then be etched through the interlayer dielectric that is self-aligned with the gate (108).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.