Floating gate circuit for backwards driven MOS output driver
US6351158B1 · kind B1 · utility
18Cited by
6References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | May 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bus driver circuit has floating gate circuits with three transistors. Two of the transistors for an inverter for operating the output power transistor. The third transistor is connected to receive control signals from well pull circuits. The control signal keeps the third transistor off when the bus driver circuit is not enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.