Phase alignment system
US6351168B1 · kind B1 · utility
6Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0814
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit including a counter, a state machine and an update circuit. The counter may be configured to present a first control signal and a second control signal in response to a reset signal and a third control signal. The state machine may be configured to generate a select signal in response to (i) the reset signal, (ii) the first control signal and (iii) the second control signal. The update circuit may be configured to generate a fourth control signal in response to the select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.