Data bus communication technique for field instrument
US6351489B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1996 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Sep 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4295
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for and method of serially transmitting a message between first and second devices coupled to a data or clock line in a process control device is disclosed. A first transition of the data or clock signal is generated during a signal cycle. A second transition of the signal is generated during the first signal cycle in order to control the duty cycle of the signal during the first signal cycle. If the duty cycle of the signal during the first signal cycle has a first value, then the first signal cycle is representative of a first data state transmitted between the first and second devices. If the duty cycle of the signal during the first signal cycle has a second value, then the first signal cycle is representative of a second data state transmitted between the first and second devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.