Method of forming a memory cell with self-aligned contacts
US6352890B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 1999 |
| Grant date | Mar 5, 2002 |
| Priority date | — |
| Expiry date | Sep 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention provides a method of forming a dynamic random access memory device which utilizes self-aligned contact pads 40a and 40b for the bit line and storage node contacts. A transfer gate 14 is formed at the fact of a semiconductor region 30. The semiconductor 30 includes a bit line contact region 44 and storage node contact region adjacent opposite edges of the transfer gate 14. Transfer gate 14 is surrounded with an insulating material 34/38. A conductive layer 40 is formed over the transfer gate 14, over the bit line contact region 44 and over the storage node contact region. This conductive layer 40 is then etched so that a first portion 40a of the conductive layer 40 provides an electrical contact to the bit line contact region 44 and a second portion 40b of the conductive layer 40 provides an electrical contact to the storage node contact region. The bit line 18 and storage node electrode 22 can then be formed in electrical contact with the first and second portions of the conductive layer 40a and 40b, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.