Method for arranging the voltage feed in an electronic device
US6353308B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2000 |
| Grant date | Mar 5, 2002 |
| Priority date | — |
| Expiry date | May 24, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/565
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The invention relates to a method for forming an operating voltage (VCC2) for an electronic device (1) from a supply voltage (VS2) by means (7, 8) for forming the operating voltage. In the method, a minimum value (Vmin) and a maximum value (Vmax) are defined for the operating voltage (VCC2). The means (7, 8) for forming the operating voltage are provided with at least a first operating voltage supply block (7) and a second operating voltage supply block (8). In the first operating voltage supply block (7), the output voltage is limited smaller than said maximum value (Vmax) for the operating voltage. Furthermore, at least a first limit value (V3) is determined, and the supply voltage (VS2) is compared with said first limit value (V3), wherein if the supply voltage (VS2) is greater than said first limit value (V3), the first operating voltage supply block (7) is activated to form the operating voltage (VCC2) from the supply voltage (VS2). If the supply voltage (VS2) is substantially smaller than said first limit value (V3), the second operating voltage supply block (8) is activated to form the operating voltage (VCC2) from the supply voltage (VS2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.