Semiconductor integrated circuit and method for controlling the same
US6353561B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 1999 |
| Grant date | Mar 5, 2002 |
| Priority date | — |
| Expiry date | Sep 17, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4093
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device, such as a synchronous DRAM, receives external commands and an external clock signal via input buffers. The device generates internal clock signals having a slower frequency than the external clock signal and uses the internal clock signals to acquire the external command. This allows more than one external command to be acquired for each cycle of the external clock. The acquired external commands are provided to command decoders for decoding. A mask circuit is connected to the decoder circuits and inhibits the decoding circuits, except for a first one of the decoding circuits, from decoding the external commands for a predetermined time period, when the first decoder circuit is decoding the external commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.